Massive Multiple-Input and Multiple-Output (MIMO) is a key candidate for addressing the rising demand of mobile data volume for 5G and beyond. Massive MIMO especially shines in rich scattering environments with a high number of users per area, where classical macro- and small-cell deployment are limited by interference. However, the Massive MIMO concept relies on massive/large numbers of active transceivers to exploit the diver-sity of the channel.
Obviously, one can simply implement as many conventional RF transmitter chains as in-dependently controlled RF outputs are required. However, size and cost therefore increase linearly with the number of outputs. RF transceiver chip manufacturers already address this issue by integrating multiple transceiver chains in a single chip Integrated Circuit (IC). Nevertheless, an economic single chip solution for massive numbers of transceivers using conventional RF circuitry is unlikely in the frequency range below 6 GHz.
Compared to analog circuit concepts, duplication and parallelization is not a problem in the digital domain. Once implemented in a digital circuit, a transmit chain can be duplicated with low effort utilizing high-speed interfaces as RF outputs. Even though several digital transmitter concepts are already published, they lack the required performance and/or are too complex to be implemented effectively. The key performance indicators are signal quality (e.g., Adjacent Channel Power Ratio, ACPR, and Error-Vector-Magnitude, EVM), coding efficiency (ratio of wanted to unwanted output power), spurious-free bandwidth (BW) and the implementation effort.
Thus, there is a desire for improved RF transmitter concepts.